Digital System Design using Verilog HDL
PC653EC || DSDV || Electronics and Communication Engineering || 6th SEM || Bachelor of Engineering
4.19 (8 reviews)
432
students
2.5 hours
content
Mar 2024
last update
$39.99
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What you will learn
1. Describe verilog HDL and develop digital circuits using gate level and data flow modeling
2. Develop verilog HDL code for digital circuits using switch level and behavioral modeling
3. Design and develop of digital circuits using Finite State Machines(FSM)
4. Perform functional verification of above designs using Test Benches.
5. Appreciate the constructs and conventions of the verilog HDL programming in gate level and data flow modeling.
6. Generalize combinational circuits in behavioral modeling and concepts of switch level modeling
7. Design and analyze digital systems and finite state machines.
8. Perform functional verification by writing appropriate test benches.
Related Topics
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udemy ID
3/26/2022
course created date
4/17/2022
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