FPGA Embedded Design, Part 1 - Verilog

Learn FPGA embedded application design starting with the basics and leaving with your own working designs.
4.50 (1100 reviews)
Udemy
platform
English
language
Hardware
category
Eduardo Corpeño
instructor
FPGA Embedded Design, Part 1 - Verilog
4,349
students
3.5 hours
content
Mar 2022
last update
$64.99
regular price

What you will learn

Design hardware behavior with the Verilog Hardware Description Language

Simulate Verilog Modules.

The curriculum will take you by the hand through learning Verilog.

In the series, you'll learn how to simulate your designs, how to make them real in an FPGA, and finally how to design and use your own Soft Processor

This first course is about the Verilog Hardware Description Language.

This is NOT a System Verilog course. However, learning Verilog is a starting point if you want to learn System Verilog (Similar to learning C prior to C++).

Screenshots

FPGA Embedded Design, Part 1 - Verilog - Screenshot_01FPGA Embedded Design, Part 1 - Verilog - Screenshot_02FPGA Embedded Design, Part 1 - Verilog - Screenshot_03FPGA Embedded Design, Part 1 - Verilog - Screenshot_04
Related Topics
1243288
udemy ID
6/6/2017
course created date
11/24/2019
course indexed date
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