Digital System Design with FPGA using Verilog

with access to Project Files and Code
3.56 (9 reviews)
Udemy
platform
English
language
Engineering
category
Digital System Design with FPGA using Verilog
91
students
8.5 hours
content
Jan 2023
last update
$59.99
regular price

What you will learn

Learn Verilog from scratch on Vivado platform

Design finite state machines (FSM) with real world application such as games

Learn Verilog to establish an interface between Vivado and FPGA, and implement design onto FPGA

Create testbench files, simulate and analyze logic circuit diagrams to verify the logic

Screenshots

Digital System Design with FPGA using Verilog - Screenshot_01Digital System Design with FPGA using Verilog - Screenshot_02Digital System Design with FPGA using Verilog - Screenshot_03Digital System Design with FPGA using Verilog - Screenshot_04
5064304
udemy ID
1/6/2023
course created date
5/10/2024
course indexed date
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