VSD - Clock Tree Synthesis - Part 2

VLSI - Building a chip is like building a city!!
4.37 (502 reviews)
Udemy
platform
English
language
Design Tools
category
Kunal Ghosh
instructor
VSD - Clock Tree Synthesis - Part 2
2,979
students
4 hours
content
Jan 2017
last update
$54.99
regular price

What you will learn

CTS Quality Checks (Skew, Power, Latency, etc.)

H-Tree

Quality Check of H-Tree

Clock Tree Buffering

Buffered H-Tree

H-Tree with uneven spread of Flops

Advanced H-Tree for Million Flops

Power Aware CTS (clock gating)

Static Timing Analysis with Clock Tree

Screenshots

VSD - Clock Tree Synthesis - Part 2 - Screenshot_01VSD - Clock Tree Synthesis - Part 2 - Screenshot_02VSD - Clock Tree Synthesis - Part 2 - Screenshot_03VSD - Clock Tree Synthesis - Part 2 - Screenshot_04
Related Topics
843840
udemy ID
5/9/2016
course created date
11/24/2019
course indexed date
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